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| HN62W448N Series 524288-word x 16-bit/1048576-word x 8-bit CMOS Mask Programmable ROM ADE-203-484(A) (Z) Preliminary Rev. 0.1 Jun. 20, 1996 Description The Hitachi HN62W448N is a 8-Mbit CMOS mask-programmable ROM organized either as 524288-words by 16-bits or as 1048576-words by 8-bits. Realizing low power consumption with low voltage operation, this memory is allowed for battery operation. And low voltage high speed page access of 60/70 ns and normal access of 120/150 ns are realized. Features * Low voltage operation : 3.3 V 0.3 V * Access time: Normal access time: 120/150 ns (max) Page access time: 60/70 ns (max) * Low power dissipation Active: 220 mW (max) Standby: 3 W (max) * Byte-wide or word-wide data organization (Switched by BHE terminal) * 4-word page access mode * Three-state data output for wired or-tying * Directly LVTTL compatible (All inputs and outputs) Preliminary: This document contains information an a new product. Specifications and information contained herein are subject to change without notice. HN62W448N Series Ordering Information Type No. HN62W448NP-12 HN62W448NP-15 HN62W448NFB-12 HN62W448NFB-15 HN62W448NTT-12 HN62W448NTT-15 Access time 120 ns 150 ns 120 ns 150 ns 120 ns 150 ns Package 600mil 42-pin plastic DIP (DP-42) 44-pin plastic SOP (FP-44D) 44-pin plastic TSOP II (TTP-44D) Pin Arrangement HN62W448NFB Series HN62W448NP Series A18 A17 A7 A6 A5 A4 A3 A2 A1 A0 CE VSS OE D0 D8 D1 D9 D2 D10 D3 D11 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 (Top view) 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 NC A8 A9 A10 A11 A12 A13 A14 A15 A16 BHE VSS D15/A-1 D7 D14 D6 D13 D5 D12 D4 VDD NC A18 A17 A7 A6 A5 A4 A3 A2 A1 A0 CE VSS OE D0 D8 D1 D9 D2 D10 D3 D11 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 (Top view) 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 NC NC A8 A9 A10 A11 A12 A13 A14 A15 A16 BHE VSS D15/A-1 D7 D14 D6 D13 D5 D12 D4 VDD 2 HN62W448N Series Pin Arrangement (cont.) HN62W448NTT Series NC A18 A17 A7 A6 A5 A4 A3 A2 A1 A0 CE VSS OE D0 D8 D1 D9 D2 D10 D3 D11 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 (Top view) 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 NC NC A8 A9 A10 A11 A12 A13 A14 A15 A16 BHE VSS D15/A-1 D7 D14 D6 D13 D5 D12 D4 VDD Pin Description Pin name A0 to A18 D0 to D14 D15/A-1 OE CE BHE VDD VSS NC Function Address Output Output/address Output enable Chip enable Byte/word selection Power supply Ground No connection 3 HN62W448N Series Block Diagram A0 to A15 Address buffer A16 to A18 X decoder Memory array Y decoder Y gates (A0, A1) (A-1) *1 Page decoder Hex / byte BHE OE 3-state output buffer CE BHE = VIH : 16-bit (D15 to D0) BHE = VIL : 8-bit (D7 to D0) D0 to D15/(D7) Note: 1. A-1 is least significant address. When BHE is 'low', D14 to D8 goes the high impedance state. 4 HN62W448N Series Absolute Maximum Ratings Parameter Supply voltage All input and output voltage Operating temperature range Storage temperature range Temperature under bias Note: 1. With respect to V SS . Symbol VDD Vin, Vout Topr Tstg Tbias Value -0.3 to +5.5 -0.3 to VDD +0.3 0 to 70 -55 to +125 -20 to +85 Unit V V C C C Note 1 1 Recommended DC Operating Conditions (Ta = 0 to +70C) Parameter Supply voltage Symbol VDD VSS Input voltage VIH VIL Min 3.0 0 2.2 -0.3 Typ 3.3 0 -- -- Max 3.6 0 VDD + 0.3 0.8 Unit V V V V DC Characteristics (VDD = 3.3 V 0.3V, V SS = 0 V, Ta = 0 to +70C) Parameter Supply current Active Standby Standby Input leakage current Output leakage current Output voltage Symbol I DD I SB1 I SB2 |IIL| |IOL | VOH VOL Min -- -- -- -- -- 2.4 -- Max 60 30 3 10 10 -- 0.4 Unit mA A mA A A V V Test conditions VDD = 3.6 V, IDOUT = 0 mA, tRC = 120/150 ns VDD = 3.6 V, CE VDD -0.2 V VDD = 3.6 V, CE = 2.2 V Vin = 0 to VDD CE = 2.2 V, VOUT = 0 to VDD I OH = -2.0 mA I OL = 2.0 mA Capacitance (VDD = 3.3 V 0.3V, V SS = 0 V, Ta = 25C, Vin = 0 V, f = 1 MHz) Parameter Input capacitance *1 *1 Symbol Cin Cout Min -- -- Max 10 15 Unit pF pF Output capacitance Note: 1. This parameter is periodically sampled and not 100% tested. 5 HN62W448N Series AC Characteristics (VDD = 3.3 V 0.3V, V SS = 0 V, Ta = 0 to + 70C) * * * * Output load: 1TTL gate + C L = 50 pF (including scope & jig) Input pulse levels: 0.4 to 2.4 V Input and output timing reference levels: 1.4V Input rise and fall time: 5 ns HN62W448N-12 Parameter Read cycle time Page read cycle time Address access time Page address access time CE access time OE access time BHE access time Output hold time from address change Output hold time from CE Output hold time from OE Output hold time from BHE CE to output in high-Z OE to output in high-Z BHE to output in high-Z CE to output in low-Z OE to output in low-Z BHE to output in low-Z Note: Symbol t RC t PC t AA t PA t ACE t OE t BHE t DHA t DHC t DHO t DHB t *1 CHZ *1 HN62W448N-15 Min 150 70 -- -- -- -- -- 0 0 0 0 -- -- -- 5 5 5 Max -- -- 150 70 150 70 150 -- -- -- -- 70 70 70 -- -- -- Unit ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns Min 120 50 -- -- -- -- -- 0 0 0 0 -- -- -- 5 5 5 Max -- -- 120 50 120 50 120 -- -- -- -- 50 50 50 -- -- -- t OHZ t BHZ t CLZ t OLZ t BLZ *1 1. t CHZ, tOHZ and t BHZ are defined as the time at which the output achieves the open circuit conditions and are not referred to output voltage levels. 6 HN62W448N Series Timing Waveforms Word Mode (BHE = 'VIH') or Byte Mode (BHE = 'VIL ') t RC Address t AA CE t CLZ OE t OLZ Dout Valid data t OE t OHZ t DHO High-Z t ACE t CHZ t DHC t DHA Notes: 1. tDHA, tDHC, tDHO: Determined by faster. 2. tAA, tACE, tOE: Determined by slower. 3. tCLZ, tOLZ: Determined by slower. Word Mode, Byte Mode Switch Address High-Z t AA t DHA High-Z BHE t BHZ D7 to D0 t DHB D15 to D8 High-Z Valid data t BLZ Valid data t BHE Valid data Notes: 1. CE and OE are enable A18 to A0 are valid. 2. D15/A-1 pin is in the output state when BHE is high, CE and OE are enable. Therefore, the input signals of opposite phase to the output must not be applied to them. 7 HN62W448N Series Page Mode A2 to A18 t RC A0, A1, (A-1) t PA t AA t DHA t PA t DHA t PA t DHA t DHA t PC t PC t PC Dout Valid data Valid data Valid data Valid data Note: CE and OE are enable. 8 HN62W448N Series Package Dimensions HN62W448NP Series (DP-42) Unit: mm 42 52.80 53.80 Max 22 15.0 Max 2.54 Min 5.06 Max 13.40 1 1.3 Max 1.20 21 15.24 0.51 Min 2.54 0.25 0.48 0.10 0.25 - 0.05 0 - 15 + 0.26 HN62W448NFB Series (FP-44D) Unit: mm 28.50 28.70 Max 44 23 12.60 3.00 Max 1 1.02 Max 22 0.17 0.05 16.04 0.30 1.72 0.40 0.10 1.27 0.10 0.12 M 0.19 0.10 0 - 10 0.80 0.20 9 HN62W448N Series Package Dimensions (cont.) HN62W448NTT Series (TTP-44D) 18.41 18.81 Max 44 23 Unit: mm 1 0.30 0.10 0.80 0.13 M 22 10.16 1.105 Max 1.20 Max 0.17 0.05 11.76 0.20 0 - 5 +0.03 -0.05 0.10 0.80 0.13 0.50 0.10 10 HN62W448N Series When using this document, keep the following in mind: 1. This document may, wholly or partially, be subject to change without notice. 2. All rights are reserved: No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without Hitachi's permission. 3. Hitachi will not be held responsible for any damage to the user that may result from accidents or any other reasons during operation of the user's unit according to this document. 4. Circuitry and other examples described herein are meant merely to indicate the characteristics and performance of Hitachi's semiconductor products. Hitachi assumes no responsibility for any intellectual property claims or other problems that may result from applications based on the examples described herein. 5. No license is granted by implication or otherwise under any patents or other rights of any third party or Hitachi, Ltd. 6. MEDICAL APPLICATIONS: Hitachi's products are not authorized for use in MEDICAL APPLICATIONS without the written consent of the appropriate officer of Hitachi's sales company. Such use includes, but is not limited to, use in life support systems. Buyers of Hitachi's products are requested to notify the relevant Hitachi sales offices when planning to use the products in MEDICAL APPLICATIONS. Hitachi, Ltd. Semiconductor & IC Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100, Japan Tel: Tokyo (03) 3270-2111 Fax: (03) 3270-5109 For further information write to: Hitachi America, Ltd. Semiconductor & IC Div. 2000 Sierra Point Parkway Brisbane, CA. 94005-1835 USA Tel: 415-589-8300 Fax: 415-583-4207 Hitachi Europe GmbH Electronic Components Group Continental Europe Dornacher Strae 3 D-85622 Feldkirchen Munchen Tel: 089-9 91 80-0 Fax: 089-9 29 30 00 Hitachi Europe Ltd. Electronic Components Div. Northern Europe Headquarters Whitebrook Park Lower Cookham Road Maidenhead Berkshire SL6 8YA United Kingdom Tel: 0628-585000 Fax: 0628-778322 Hitachi Asia Pte. Ltd. 16 Collyer Quay #20-00 Hitachi Tower Singapore 0104 Tel: 535-2100 Fax: 535-1533 Hitachi Asia (Hong Kong) Ltd. Unit 706, North Tower, World Finance Centre, Harbour City, Canton Road Tsim Sha Tsui, Kowloon Hong Kong Tel: 27359218 Fax: 27306071 11 HN62W448N Series Revision Record Rev. 0.0 0.1 Date Nov. 22, 1995 Jun. 20, 1996 Contents of Modification Initial issue AC Characteristics Output load: 1TTL + CL = 100 pF to 1TTL + C L = 50 pF tPC min: 60/70 ns to 50/70 ns tPA , t OE, tCHZ, tOHZ , t BHZ max: 60/70 ns to 50/70 ns Deletion of timing waveform for power up sequence Drawn by Y. Yamada Approved by T. Wada 12 |
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